1. Field of the Invention
This invention relates to a control circuit employed in a bias circuit of a cascaded amplifier, especially relates to a control circuit employed in a bias circuit of a programmable gain amplifier (PGA).
2. Description of the Prior Art
The differential amplifier is utilized as the control circuit employed in a bias circuit of a programmable gain amplifier. The output voltage of the differential amplifier controls the drain current of a switch made up of the PMOS (P-type Metal Oxide Semiconductor) transistor. In addition, the magnitude of the source voltage of the PMOS transistor is fed back to one input terminal of the differential amplifier. The other input terminal of the differential amplifier is connected to the output terminal of a digital-to-analog converter. It is this feedback mechanism which controls the drain current of the PMOS switch and hereby the collector current of the current source below it.
The gain control of traditional programmable gain amplifier may be done through the control of biasing current for each gain stage. Referring to FIG. 1, when the traditional control circuit 10 is in operation, the control circuit 10 is electrically coupled to the programmable gain amplifier 12 to provide the bias current of the programmable gain amplifier 12. The control circuit 10 includes the operational amplifier 14, with the positive input terminal connected to the output terminal of the digital-to-analog converter. In addition, the output terminal of the operational amplifier 14 is connected to the gate of the transistor 16, which is a PMOS transistor in the traditional control circuit 10.
The source of transistor 16 is simultaneously connected to a resistor and to the negative input terminal of the operational amplifier 14. The drain of transistor 16 is connected to base of the first bipolar transistor 18, and then is connected to the collector of the second bipolar transistor 20. The emitter of the second bipolar transistor 20 is coupled through a resistor to voltage V.sub.EE. The base of the second bipolar transistor 20 is shorted to the emitter of the first bipolar transistor 18 and then is coupled to the programmable gain amplifier 12 to provide the bias current 1.
The conventional schematic utilized to control the current for the programmable gain amplifier has the following disadvantages. First, the stability problem arises from the feedback circuit has to be paid special attention during the design phase. Secondly, the PMOS transistor (transistor 16) as a voltage control current source used in the conventional control circuit is operated in the triode region. The equivalent channel resistance is a nonlinear parameter which is sensitive to the process variation. In addition, the schematic diagram is more complex and needs more layout space.